Chicken bits.

2026-03-13

I recently learned about Chicken bits, specific bits in a CPU that are hardcoded to be 0/1 to disable/enable certain features. I document my learnings in this post. Skip the next section if you already know how chips are made.

Chip design and production process

A typical chip production process goes as follows (subject to my limited understanding): User applications and workflows influence instruction set architectures (ISA). E.g. AES instructions that added support for different encryption modes because of the widespread use of AES in modern server applications. ISA is first implemented in microarchitecture, then made more concrete in RTL specifications that define individual logic gates and their interactions.

Hardware companies output verified and strongly tested RTL designs. The rest of the process is usually outsourced (unless they have their own fabs). Designing the RTL and ensuring that the RTL designs are correct is a complex undertaking. Yet, the process is as agile as software development once the initial costs of setting up the infrastructure are covered. Changes are relatively easy and cheap. Relative to what comes next.

The RTL designs are converted to floor plans (GDSII) that specify the physical layout of the chip and are sent to manufactures in a process known as tape out. Manufactures use these floor plans to make masks that etch the logic gates onto the silicon wafer. Tape out costs for modern single-digit nanometer chips are of the order ~$100M.

Configuration bits and Chicken bits

Included in the RTL design are configuration bits that can be set to 0/1 to enable/disable certain features. These bits are used for testing and debugging purposes. For example, a configuration bit might disable a certain cache level to test the performance of the chip without it. Some of these bits are exposed to the user in model-specific registers or MSRs. But many bits are kept hidden.

While new features are added to the RTL designs with the promise of improved performance gains, the actual physical chips might not realize the gains. It is not very clear to me how such discrepancies arise. But at that point, it is too late to change designs. The RTL has been converted to a floor plan and masks have been manufactured. It is too expensive to redo the process.

Therefore, hardware designers lock the values of configuration bits to 0 to disable nonperforming features. In doing so, they chicken out of certain features. Hence, chicken bits.